We are seeking a talented FPGA Team Lead to join our Tel Aviv R&D center. If you want to have a key role in the development of an FPGA based, High availability & high performance-oriented fintech product, Come join us.
What you will do:
You will lead the development of all FPGA related products in Solidus.
Your team will handl real-time and vast data from multiple sources, normalize and digest them and then run multiple ML algorithms on the data.
Your team will also perform latency optimizations to improve overall system performance and to decrease the platform latency.
Your impact
- Owning features from design and development to production.
- Implement cross-platform FPGA based solutions using top of the art technologies.
- Mentor team members and collaborate with colleagues in solving complex problems and overcoming design challenges.
Minimum qualifications:
- Solid programming foundation (e.g. data structure and algorithm, performance, paradigm, revision control, CI/CD, testing).
- 5+ years’ experience with FPGA RTL design (Verilog, SystemVerilog) and FPGA-based systems, beyond course work (e.g. industry experience or a large multi-term research project).
- 3+ years’ experience with C \ C++ design, beyond course work (e.g. industry experience or a large multi-term research project).
- Good understanding of micro-architecture concepts (cache, MMU, pipelines).
- Good understanding of different Ethernet communication protocols.
- Experience writing or maintaining scripts or makefiles that automate code synthesis is a plus.
Preferred Qualifications
- Familiarity with VHDL.
- Experience in developing Xilinx HLS kernels using C++.
- Experience with enterprise-grade software
- Master’s / Bachelor’s degree in Computer Science, Electrical Engineering, or equivalent practical experience.