Solidus is a multinational, dynamic and profitable algo-trading startup. We develop ultra-low latency trading strategies that are deployed in numerous markets worldwide.
We strive to employ the best people who are driven by solving difficult problems and reward them with top-notch benefits.

Senior FPGA engineer

Tel Aviv

We are seeking a talented FPGA Engineer to join our Tel Aviv R&D center. If you want to have a key role in the development of an FPGA based, High availability & high performance-oriented fintech product, Come join us.


Your impact:

  • Owning features from design and development to production.
  • Implement cross-platform FPGA based solutions using different technologies.
  • Perform latency optimizations to improve overall system performance.
  • Collaborate with team members and colleagues in solving complex problems and overcoming design challenges.


Minimum qualifications:

  • Solid programming foundation (e.g. data structure and algorithm, performance, paradigm, revision control, CI/CD, testing).
  • 5+ years’ experience with FPGA RTL design (Verilog, SystemVerilog) and FPGA-based systems, beyond course work (e.g., industry experience or a large multi-term research project)
  • Experience in developing Xilinx HLS kernels using C++.
  • Good understanding of micro-architecture concepts (cache, MMU, pipelines).
  • Good understanding of different Ethernet communication protocols.
  • Experience writing or maintaining scripts or makefiles that automate code synthesis is a plus.


Preferred Qualifications:

  • Familiarity with VHDL.
  • Experience with enterprise-grade software
  • Master’s / Bachelor’s degree in Computer Science, Electrical Engineering, or equivalent practical experience.
  • Knowledge in modern C++ (C++11 /14 /17).
Apply now
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Begin Road 132, Tel Aviv
Azrieli Towers, Square Tower 35th floor
+972 74 7024374
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